Welcome to the FLASH Home Page

What's new? (most recent: 4/12/95)

This site provides information about the design of the FLASH (FLexible Architecture for SHared memory) multiprocessor and about related work here at Stanford.

The FLASH machine is being developed in partnership with the Scalable Systems Division at Intel and with the Computing Systems Technology Office in ARPA. This project is part of the High Performance Computing and Communications Program.

From here you can explore the following:

• The FLASH pages for the HPCC Blue Book (FY96, updated quarterly): a status report & introduction to the project

• FLASH and related work at Stanford

• Related work elsewhere